Computer Organization and Assembly Language Programming
Not rated yetRate this bookAn introductory computer organization textbook for students connecting high-level programs with ARMv7 assembly, data representation, memory layout, instruction execution, and the hardware mechanisms behind them.
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About this book
Computer Organization and Assembly Language Programming by Chenxi Wang and Muhammad Rashed is a 2026 first-edition textbook published by Mavs Open Press. It was developed for CSE 2312 at the University of Texas at Arlington and uses ARMv7 as its reference architecture.
Sixteen chapters progress from number systems and binary operations to assembly syntax, memory access, branching, and the stack. Later topics include strings and integer arrays, floating-point representation and VFP instructions, structure alignment, pipelining, caches, and virtual memory. The book connects explanations with worked examples and assembly implementations of higher-level operations.
Its focus is understanding what instructions do to registers, memory, and execution flow. Readers should keep the book’s architecture and simplified teaching models in view when using its examples; the descriptions are not interchangeable with those of every processor or programming environment.
Book summary
The book’s central aim is to make the relationship between programs and computer hardware visible. A high-level operation ultimately depends on representations, instructions, registers, memory accesses, and changes in execution flow. Assembly provides a setting in which students can examine those relationships directly.
The early chapters develop the vocabulary needed to interpret bit patterns and arithmetic. The middle chapters connect that foundation with ARMv7 instructions, memory organization, procedure calls, and common data structures. Later chapters consider representations and performance, including floating-point values, alignment, pipeline scheduling, and the memory hierarchy.
Across this progression, students must keep several distinctions clear: a value differs from its bit pattern; a memory address differs from the contents at that address; copying bits differs from converting a number; and a single instruction’s work differs from the performance of a whole sequence. The chapter overviews below follow selected passages from each chapter.
Chapter-by-chapter summary
1. Introduction to CSE2312
The opening chapter connects software with the hardware that executes it. It introduces the processor, memory, buses, and input/output devices, then explains why studying assembly can help with low-level programming, debugging, and performance. The course is framed as preparation for understanding topics such as architecture, operating systems, embedded systems, and compilers.
2. The Number Systems
Binary, octal, decimal, and hexadecimal provide different ways of representing numerical values. The chapter introduces their notation and develops the distinction between unsigned and signed binary representations, including two’s complement. Its main contribution is to make bit patterns interpretable: their meaning depends on the representation and the number of bits available.
3. Conversion of Number Systems
The chapter develops methods for moving between numerical representations. Positional weights and repeated division provide ways to translate decimal values into binary, while weighted sums recover decimal values from binary digits. These procedures help students understand why differently written numbers can represent the same value and prepare them to interpret data used in assembly.
4. ALU Operations
The arithmetic logic unit performs calculations and logical operations on binary operands. The chapter connects its inputs and operation selection with addition, subtraction, negation, and bitwise logic. Masking shows how logical operations can target particular bits. The focus shifts from representing values to understanding how processor operations transform them.
5. Flags and Shift Operations
A numerical result alone does not describe everything that happened during an operation. Carry, zero, negative, and overflow flags provide additional information, with different relevance for signed and unsigned interpretations. Logical shifts, arithmetic shifts, and rotation introduce ways of rearranging bits, emphasizing how the treatment of vacated positions affects the resulting representation.
6. Assembly Syntax
ARMv7 is the book’s reference architecture. This chapter introduces the components of an instruction, including the operation, destination and source registers, optional conditions, and flag-setting suffixes. Its examples show that reading assembly requires tracking both data changes and the conditions controlling execution, connecting earlier arithmetic and flag concepts with actual instruction notation.
7. Data in Memory and the Load-Store Architecture
In the ARMv7 model used here, data moves between memory and registers before arithmetic operations can use it. The chapter explains byte addresses, pointers, endianness, load and store instructions, and addressing modes. These distinctions help students separate where a value is located from how its bytes are arranged and how an instruction accesses it.
8. Branch Instructions, Procedure Calling Mechanism, and Assembly Implementation
Branches redirect execution rather than allowing it to proceed only in sequence. The chapter introduces unconditional and conditional branching and explains the roles of the program counter and link register. Calling a procedure requires retaining a return location, linking the mechanics of instructions with the larger task of organizing a program’s flow.
9. Stack
The stack stores temporary information in last-in, first-out order. The opening passages explain push and pop operations and relate the stack pointer to the link register and program counter. The ARM stack arrangement used in the book connects memory addresses with function-call bookkeeping, providing a basis for tracing changes during execution.
10. String (Type Char) in Memory and Assembly Implementation
The chapter explains the byte-oriented character representation used in its examples and how C-style strings occupy consecutive memory locations with a terminating null character. It then introduces assembly implementations of string functions. Students can connect an apparent high-level object—a string—with the individual stored values and address changes used to process it.
11. Array of Integers in Memory and Assembly Implementation
Traversing an integer array requires accounting for the size of each element. The chapter compares byte-oriented strings with wider integer types, showing why an index change can require a different address increment. Post-indexed addressing combines reading an element with advancing a pointer, linking the layout of an array to the instructions used to traverse it.
12. Binary Decoding and Encoding (Floating-point and Decimal)
The chapter extends number conversion from integers to fractional values and floating-point representations. Selected passages introduce the sign, exponent, and fraction fields of single-precision IEEE 754 encoding. The distinction between a number and its stored representation helps students understand why interpreting a bit pattern requires knowing the intended format.
13. Data Alignment (Packed and Unpacked) and Assembly Implementation
Memory layout affects both storage use and access. The chapter compares structures that include padding to align fields with packed structures that place fields closer together. Member offsets connect these layouts to assembly access. The discussion presents a tradeoff between compact representation and alignment-sensitive performance within the architecture being studied.
14. VFP Instructions (VLDR, VSTR, VMOV, and VCVT) and Assembly Implementation
Floating-point work uses the VFP resources described in the book, including single- and double-precision registers that share storage. Selected instruction passages distinguish loading, storing, copying raw bits, and converting numerical types. That distinction matters because moving a representation does not automatically preserve its interpretation as a different kind of number.
15. Clock Cycle and Pipeline in ARM
The chapter uses a simplified three-stage model—fetch, decode, and execute—to explain instruction timing. Overlapping those stages allows multiple instructions to progress together. Branch examples show why changes in control flow complicate the schedule. Students should interpret the timing discussion within this teaching model rather than as a description of every ARM processor.
16. Physical Memory (RAM), Cache, and Memory Virtualization
Memory performance becomes a constraint when processors need data more quickly than main memory can supply it. Temporal and spatial locality explain why caches can help. Selected later passages introduce average access time and virtual-to-physical address mapping, connecting the speed of memory access with the separate questions of address organization and application isolation.
What students can learn
- Interpret number representations and relate bit-level operations to assembly instructions.
- Distinguish registers, addresses, stored data, and the movement of information between them.
- Explain the roles of branches, return addresses, and the stack in program execution.
- Connect data layout and simplified pipeline and cache models with performance reasoning.
How to study this book
Academic Master suggests working through the chapters in order while keeping a small table of register values, flags, and memory addresses for each example. Predict an instruction’s effect before checking the book’s explanation. Compare C-style data operations with their assembly counterparts, and keep the stated architecture and timing assumptions beside any performance calculation.
Sources and coverage
Based on the 2026 first-edition publisher PDF: the opening two pages of all sixteen chapters, plus selected passages on two’s complement, shifts, byte order and addressing, floating-point encoding, VFP instructions, caches, and virtual memory. Contents were checked against the PDF and the institutional catalogue. This is a selective chapter overview; the complete examples, exercises, diagrams, and equations were not reviewed or independently validated. Source: official book source.
This page provides book information and study material. Full-text access is provided by the original publisher or authorised source; a listing does not grant permission to republish the book.
Read our Library Access & Copyright policyRepresentations
Interpret bits according to their numerical format and width.
Instruction effects
Track changes in registers, flags, memory, and execution flow.
Memory layout
Relate data sizes, byte order, and alignment to access patterns.
Performance models
Connect pipelines, locality, and caches with the book’s stated assumptions.
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